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"ELECTRICAL TESTING" OR 电力测试
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All (10)
Dice (4)
Contact Pads (3)
Alignment Apparatus (2)
Carrier Substrate (2)
Electronic Device (2)
Wafer Level (2)
Other Topics (2)
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1.
Inventor:
Chang David D C
Assignee:
AT&T Corp
Attorney:
Anderson Roderick B
;
Brown Kenneth M
Title:
Electrical test apparatus and method
Patent Office: United States of America Patent and Trademark Office. Granted Patents (USPTO) Document Number:
5500605
Publication date :
1996-03-19
Referenced by:
111
Reference cited:
10
2.
Inventor:
Akram Salman
Assignee:
Micron Technology, Inc
Attorney:
Trask Britt
Title:
Method of fabricating a multi-chip module
Patent Office: United States of America Patent and Trademark Office. Granted Patents (USPTO) Document Number:
6214641
Publication date :
2001-04-10
Referenced by:
81
Reference cited:
13
3.
Inventor:
King Jerrold L
;
Nevill Leland R
Assignee:
Micron Technology, Inc
Attorney:
Workman, Nydegger & Seeley
Title:
Semiconductor chip package
Patent Office: United States of America Patent and Trademark Office. Granted Patents (USPTO) Document Number:
6198172
Publication date :
2001-03-06
Referenced by:
75
Reference cited:
3
4.
Inventor:
Farnworth Warren M
Assignee:
Micron Technology, Inc
Attorney:
TraskBritt
Title:
Stereolithographic method for applying materials to electronic component substrates and resulting structures
Patent Office: United States of America Patent and Trademark Office. Granted Patents (USPTO) Document Number:
6524346
Publication date :
2003-02-25
Referenced by:
67
Reference cited:
54
5.
Inventor:
Barrett Keith E
Assignee:
Micron Technology, Inc
Attorney:
Trask Britt
Title:
Test interposer for use with ball grid array packages assemblies and ball grid array packages including same and methods
Patent Office: United States of America Patent and Trademark Office. Granted Patents (USPTO) Document Number:
6081429
Publication date :
2000-06-27
Referenced by:
66
Reference cited:
20
6.
Inventor:
Kong Alvin M
;
Lau James C
;
Chan Steven S
Assignee:
TRW Inc
Title:
Mass simultaneous sealing and electrical connection of electronic devices
Patent Office: United States of America Patent and Trademark Office. Granted Patents (USPTO) Document Number:
5448014
Publication date :
1995-09-05
Referenced by:
65
Reference cited:
12
7.
Inventor:
Beckenbaugh William M
;
Lytle William H
;
Berman Bernard
Assignee:
Motorola, Inc
Attorney:
Dover Rennie William
;
Wolin Harry A
Title:
Method of forming contact pads for wafer level testing and burn-in of semiconductor dice
Patent Office: United States of America Patent and Trademark Office. Granted Patents (USPTO) Document Number:
5593903
Publication date :
1997-01-14
Referenced by:
64
Reference cited:
4
8.
Inventor:
Deckert Richard Allan
;
Engelking Steven
;
Evans Joey Dean
Assignee:
Sony Corporation
;
Sony Electronics Inc
Attorney:
Wood, Herron & Evans, LLP
Title:
Integrated testing method and apparatus for semiconductor test operations processing
Patent Office: United States of America Patent and Trademark Office. Granted Patents (USPTO) Document Number:
6137303
Publication date :
2000-10-24
Referenced by:
56
Reference cited:
4
9.
Inventor:
Nolan Charles C
;
Sahr Stuart
Assignee:
Signatone Corporation
Attorney:
Castle Linval B
Title:
Temperature conditioner for tests of unpackaged semiconductors
Patent Office: United States of America Patent and Trademark Office. Granted Patents (USPTO) Document Number:
4845426
Publication date :
1989-07-04
Referenced by:
53
Reference cited:
2
10.
Inventor:
Lim Samuel S S
;
Tan Siew K
Assignee:
Sunright Limited
Attorney:
Morgan & Finnegan, LLP
Title:
Reusable carrier for burn-in/testing on non packaged die
Patent Office: United States of America Patent and Trademark Office. Granted Patents (USPTO) Document Number:
5543725
Publication date :
1996-08-06
Referenced by:
51
Reference cited:
9
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